
IDT70V37L
High-Speed 3.3V 32K x 18 Dual-Port Static RAM
Truth Table I – Chip Enable (1,2)
Industrial and Commercial Temperature Ranges
X
NOTES:
CE
L
H
CE 0
V IL
< 0.2V
V IH
X
>V DD -0.2V
X (3)
CE 1
V IH
>V DD -0.2V
X
V IL
(3)
<0.2V
Port Selected (TTL Active)
Port Selected (CMOS Active)
Port Deselected (TTL Inactive)
Port Deselected (TTL Inactive)
Port Deselected (CMOS Inactive)
Port Deselected (CMOS Inactive)
Mode
4852 tbl 06
1. Chip Enable references are shown above with the actual CE 0 and CE 1 levels; CE is a reference only.
2. 'H' = V IH and 'L' = V IL .
3. CMOS standby requires 'X' to be either < 0.2V or >V DD -0.2V.
Truth Table II – Non-Contention Read/Write Control
Inputs (1)
Outputs
CE (2)
H
X
L
L
L
L
L
L
X
R/ W
X
X
L
L
L
H
H
H
X
OE
X
X
X
X
X
L
L
L
H
UB
X
H
L
H
L
L
H
L
X
LB
X
H
H
L
L
H
L
L
X
SEM
H
H
H
H
H
H
H
H
X
I/O 9-17
High-Z
High-Z
DATA IN
High-Z
DATA IN
DATA OUT
High-Z
DATA OUT
High-Z
I/O 0-8
High-Z
High-Z
High-Z
DATA IN
DATA IN
High-Z
DATA OUT
DATA OUT
High-Z
Mode
Deselected: Power-Down
Both Bytes Deselected
Write to Upper Byte Only
Write to Lower Byte Only
Write to Both Bytes
Read Upper Byte Only
Read Lower Byte Only
Read Both Bytes
Outputs Disabled
NOTES:
1. A 0L — A 14L ≠ A 0R — A 14R
2. Refer to Truth Table I - Chip Enable.
Truth Table III – Semaphore Read/Write Control (1)
4851 tbl 07
Inputs (1)
Outputs
CE (2)
H
X
H
X
L
L
R/ W
H
H
↑
↑
X
X
OE
L
L
X
X
X
X
UB
X
H
X
H
L
X
LB
X
H
X
H
X
L
SEM
L
L
L
L
L
L
I/O 9-17
DATA OUT
DATA OUT
DATA IN
DATA IN
______
______
I/O 0-8
DATA OUT
DATA OUT
DATA IN
DATA IN
______
______
Mode
Read Data in Semaphore Flag
Read Data in Semaphore Flag
Write I/O 0 into Semaphore Flag
Write I/O 0 into Semaphore Flag
Not Allowed
Not Allowed
NOTES:
1. There are eight semaphore flags written to I/O 0 and read from all the I/Os (I/O 0 -I/O 17 ). These eight semaphore flags are addressed by A 0 -A 2 .
2. Refer to Truth Table I - Chip Enable .
6.42
4851 tbl 08